CONVOLUTIONAL NEURAL NETWORK IMPLEMENTATION IN FPGA FOR IMAGE RECOGNITION
Neural networks (NN) are being researched and improved to a degree that machines are able
to closely resemble the capacity to execute complex tasks that only an intelligent animal is capable
of, vision used in the interpretation and recognition of the environment is one of such tasks that is
being researched so future technologies can simulate vision in autonomous vehicles to further
improve self-driving capabilities, increasing driver convenience, help avoid accidents and even
autonomous delivery, convolutional neural networks, inspired by the mechanics of animal vision, are
1utilized for the complex task of image recognition. Field Programmable Gate-Arrays (FPGA) recent
developments have given it more parallel processing and processing speed making it a prime
candidate for the implementation of NNs efficiently, with more processing capabilities and low
response times compared with the alternatives. The objective of this work is to evaluate the
performance viability of FPGA implementation of an image classification NN with acceptable
accuracy and low response time.
to closely resemble the capacity to execute complex tasks that only an intelligent animal is capable
of, vision used in the interpretation and recognition of the environment is one of such tasks that is
being researched so future technologies can simulate vision in autonomous vehicles to further
improve self-driving capabilities, increasing driver convenience, help avoid accidents and even
autonomous delivery, convolutional neural networks, inspired by the mechanics of animal vision, are
1utilized for the complex task of image recognition. Field Programmable Gate-Arrays (FPGA) recent
developments have given it more parallel processing and processing speed making it a prime
candidate for the implementation of NNs efficiently, with more processing capabilities and low
response times compared with the alternatives. The objective of this work is to evaluate the
performance viability of FPGA implementation of an image classification NN with acceptable
accuracy and low response time.